Computers, including the VAX series, have a facility to load programs into memory and execue them. The first instruction to be executed is pointed to by a register called PC (Program Counter). The CPU fetches the instruction at the memory location in the PC and then increments the value in the PC by the length of the instruction; i.e., the next instruction to be preformed will be the next instruction in memory. VAX instructions contain their own lengths (the machine language does; you don't see this as an assembly language programmer) so incrementing the PC by the correct amount is normally pretty easy. However, you might not always want to perform the very next instruction in your program. To perform loops and conditional statements you need to be able to alter the value in the PC
JMP destination
This simple instruction loads the value of destination (a memory address) into the PC, so the instruction at that memory address is executed next. How does it do that? Well, PC is just a general purpose register ; R15. So this branch instruction is equivalent to
MOVL destination, R15I haven'r written anything about MOVL (yet) but it moves the value in the operand on the left into the operand on the right. JMP allows us to directly manipulate the PC (R15) and therefore alter the flow of execution of our program statments. This is frequently necessary in assembly language, so it's vital that we're able to force an"uncoditional branch". However, there are other times when we have no idea as to what values our variable can receive, but we want our programs to follow different logic paths based on those values. How do we do that?
PSL - the Program Status Longword
The PSL has to parts; the high order word is used by the system, but the low order word is used by programmers and is called the PSW (Program Status Word). Certain bits are set in the PSW by arithmetic operations:
N - Negative bit.It's set to 1 if the result of an arithmetic operation is negative. E.g., 4 - 5 = -1
Z - Zero bit.
It's set to 1 if the result of an arithmetic operation is zero. E.g., 1 - 1 = 0;
V - Overflow bit.
It's set to 1 if an arithmetic operation results in a number too big to be represented by the data data type assigned to it. E.g., 32767 + 1 is too big to be stored in an integer because integers can only hold numbers in the range -32768 to 32767.C - Carry Bit.
It's set if an arithmetic operation performs a borrow in or carry out of the most signifi cant bit occurs.
Because the PSW bits are set we can use them to test for certain conditions, and "branch conditionally". The general form is:
Bcondtion destination
Branches based on signed number comparisons Instruction English equivalent Branch Condition BEQL Branch on EQuaL Z = 1 BNEQ Branch on Not EQual Z = 0 BLSS Branch on LeSS than N = 1 BLEQ Branch on Less than or EQual (N or Z) = 1 BGTR Branch on GreaTeR (N or Z) = 0 BGEQ Branch on Greater than or EQual N = 0 Branches based on unsigned number comparisons BEQLU Branch on EQuaL Unsigned Z = 1 BNEQU Branch on Not EQual Unsigned Z = 0 BLSSU Branch on LeSS than Unsigned C = 1 BLEQU Branch on Less than or EQual Unsigned (C or Z) = 1 BGTRU Branch on GreaTeR Unsigned (C or Z) = 0 BGEQU Branch on Greater than or EQual Unsigned C = 0
Here's an example in C:
if (a < 0) a++;
CMPL #0, a ; OK, MACRO-32 requires data types and I used Longword. ; CMPL subtracts a (a Longword) from 0 (#0 means the value 0) ; and sets the PWS bits N abd Z appropriately: N = 1, Z = 0 BGEQ SKIPADD ; if a >= 0 then goto the label SKIPADD INCL a ; if a < 0 then add 1 to a SKIPADD: ; this label was the target of the BGEQ instruction